From Where Phase Logic Control

Greetings,

Can anyone knows that how the Phase sequence logic works like where it is coded that after Running Composite  complete execution it will go to an idle state(Idle block) or when we put phase to Restart  state directly from Running it will show an error but when Restart after putting phase on Hold  it will not show any error?

So from where it comes to know that it is not the correct procedure?

  • In reply to Nirit:

    There is no action or calc block instructing the phase logic, just a built into the software state transition monitor where the phase is being run (controller or workstation) that disables or allows the state changes depending on that diagram (which is derived from ISA-88 standard).

    Changing of the phase states is handled either thru the Batch Executing (DeltaV Batch) or Manual commands (External) via phase faceplate depending on the owner of the Phase (shown in parenthesis).